The present invention relates to a semiconductor device and a method of manufacturing the same and, specifically, to an effective technology applied to a semiconductor device having a fuse formed by a Damascene technique.
In the method of manufacturing a fine semiconductor device, a fine wiring forming method called-“Damascene technique” is becoming popular.
In the Damascene technique, after a fine wiring groove is formed in an inter-layer insulating film over a semiconductor substrate, a metal film is deposited on the inter-layer insulating film including the inside of the wiring groove, and the metal film outside the wiring groove is removed by chemical mechanical polishing to form a fine buried wiring in the groove.
In a dual-Damascene technique in particular, a via hole for connecting the wirings of lower layers is formed in the lower portion of a wiring groove formed in an inter-layer insulating film, and a metal film is buried in the wiring groove and the via hole at the same time to form a wiring, thereby reducing the number of steps. Meanwhile, a technique for forming a buried wiring in the inside of a wiring groove after a metal plug is formed in the via hole is called “single-Damascene technique”.
As the metal material of the buried wiring, Cu (copper which can ensure high reliability even when it is made thin is mainly used. When a buried wiring is formed in an inter-layer insulating film by the Damascene technique, to reduce capacitance which is generated between adjacent wirings, the inter-layer insulating film is made of an insulating material having a low dielectric constant. Technology for forming a buried wiring in an inter-layer insulating film made of a low-dielectric constant material by the Damascene technique is disclosed by Japanese Unexamined Patent Publication No. 2004-221275 (patent document 1) and Japanese Unexamined Patent Publication No. 2003-124307 (patent document 2).
Japanese Unexamined Patent Publication No. 2003-318262 (patent document 3) discloses a structure that the copper wiring of the uppermost layer is used as a fuse and an SiCN film is formed on the surface of the copper wiring of the uppermost layer.    [patent document 1] Japanese Unexamined Patent Publication No. 2004-221275    [patent document 2] Japanese Unexamined Patent Publication No. 2003-124307    [patent document 3] Japanese Unexamined Patent Publication No. 2003-318262